1. Field of the Invention
This invention relates generally to non-volatile memory, and more particularly to managing non-volatile memory based on the health of the non-volatile memory.
2. Description of the Related Art
Non-volatile memory is memory that stores data when power is disconnected from the system. Phase-change memory (PCM) and flash memory are examples of non-volatile computer memory in use today. Flash memory is a non-volatile computer memory that can be electrically erased and reprogrammed. Because flash memory retains stored data even when power to the memory is turned off, flash memory is widely used in battery-driven portable devices. For example, flash memory often is utilized in digital audio players, digital cameras, mobile phones, and USB flash drives, which are used for general storage and transfer of data between computers.
Unlike many other storage devices, flash devices cannot be overwritten. Instead, to update data in a particular storage location within flash memory, the location must first be erased, then the new data written in its place. Moreover, when erasing data in a flash device, an entire block must be erased instead of just the particular page or pages of the block that were updated. To facilitate this process, a typical flash controller will find a block of memory that has been previously erased and write the updated page to this new block at the same page offset. Then, the remaining pages of the old block are copied to the new block. Later, the old block is erased and made available for use by some other operation.
However, there are electrical limitations to the number of times a memory block can be erased and reprogrammed before the block ceases to function properly. When this occurs, the flash memory system typically experiences a general degradation of overall performance and capacity. In some instances, memory performance within a non-volatile memory system can depend on how often the individual memory blocks are erased and reprogrammed. For example, if a block is erased repeatedly, that block may wear out relatively quickly. On the other hand, if a block is programmed and the data is allowed to remain for a significant amount of time, the block may wear relatively slowly.
To increase the life of non-volatile memory, prior art techniques have been developed wherein wear leveling based on the number of erase-write cycles is performed on the memory. Wear leveling procedures attempt to utilize the memory in an even fashion, distributing erase-write cycles evenly across the individual memory blocks of the non-volatile memory. Typical wear leveling procedures attempt to estimate when a memory block will wear out based on the number of times the block is erased. These procedures assume that the more times a block is erased, the more errors will occur in the block, and eventually the block will cease to function properly. This approach often is supported by non-volatile memory manufactures, who generally provide an estimated number of times that a memory block can be erased and/or reprogrammed before a particular chance of failure will occur.
FIG. 1 is a graph 100 showing erase counts of a prior art non-volatile memory having low erase-write cycle blocks and high erase-write cycle blocks. In FIG. 1 each bar represents the relative number of erase-write cycles occurring within each memory block, with longer bars indicating a larger number of erase-write cycles. The memory starts at memory block 0 and ends at memory block N. In the example of FIG. 1, several low erase-write cycle memory blocks 102 are present in the memory. These memory blocks 102 represent memory blocks that have been programmed relatively very few times. For example, they can represent blocks storing a user's favorite songs in an MP3 player. Because the user does not want to remove the songs, the memory blocks 102 storing the song data is programmed once with the song and then not reprogrammed. While the remaining memory blocks 104 are reprogrammed regularly with song data that the user only stores for a relatively short period of time. As a result, the memory blocks 102 storing the favorite songs experience a low number of erase-write cycles, while the remaining memory blocks 104 storing transient songs experience a much higher number of erase-write cycles. As a result, prior art wear leveling techniques will regard the memory blocks 104 experiencing a high number of erase-write cycles as having a shorter amount of remaining useful life than the memory blocks 102 experiencing a lower number of erase-write cycles.
However, in reality, devices are different. That is, estimates of useful life based on the number erase-write cycles experienced by a memory block are not always accurate. For example, in FIG. 1, a memory block 104 experiencing a high number of erase-write cycles can actually have the same amount of, or more, remaining useful life than a memory bock 102 experiencing a lower number of erase-write cycles. This is because one non-volatile memory device may function and react differently to the same usage as another non-volatile memory device, even from the same manufacturer. Thus, wear estimates based on erased counts and/or manufacturer estimates generally do not provide an accurate indication of memory block life in a particular device.
Hence, in view of the foregoing, there is a need for systems and methods for providing accurate knowledge of the current abilities of the memory blocks based on actual memory block performance instead of predictive memory block performance. The systems and methods should allow memory blocks to wear out evenly allowing increased memory usage. Moreover, the systems and methods should provide effective leveling without undue overhead costs and additional memory usage.